Re: Speculation on ARM licensed by DRAM companies

[wmor1@xxxxxxxxxxxxxxxxxxxxx]

> Date sent:      Sun, 20 Jul 1997 13:12:51 +0200 (MET DST)
> From:           Eugene Leitl <Eugene.Leitl@lrz.uni-muenchen.de>
> Subject:        Re: Speculation on ARM licensed by DRAM companies
> To:             WMOR1 <WMOR1@student.monash.edu.au>
> Copies to:      wmor1@student.monash.edu.au, misc@pisa.rockefeller.edu

> On Sun, 20 Jul 1997, WMOR1 wrote:
> 
> > I ran accross this today in the Arm microprocessor group, thought it 
> > maybe of interest.
> 
> It _is_ of interest. I've just revived by Novix 4000 board, and got some 
> ARM Forth listings as I contemplate porting them to my Newton 130. It 
> appears ARM has a good architecture to do Forth with.

Yes I remember this from years ago.

>  
> > Wayne.
> > 
> > torbenm@diku.dk (Torben AEgidius Mogensen) wrote:
> > >With Hyundai as the newest licensee of ARM, there are now a number of
> > >the largest DRAM manufacturers that have licensed ARM cores. This
> > >leads me to speculate on whether we in the future will see DRAM with
> > >integrated ARM cores. About a year ago I read a paper (I think it was
> > >in Computer Architecture News and entitled "Breaking the Memory Wall"
> > >or something similar) that speculated that it may be a good idea to
> > >put a simple RISC core on a DRAM chip. The arguments were:
> 
> Anybody noticed the avent of DSPs with large (1-4 MBit) on-die SRAMs?
> I am referring particularly to ADSP-21061 & family, and TI's C6x chip.
> Notice that the latter features a 256 bit broad on-die bus and VLIW, a 
> point I have been talking about for years.
> 


> Yeah, the difference between a DRAM and an SRAM cell may matter 
> significantly less if we are talking of on-die accesses and tiny geometries.
> 
> > >technology on separate chips. The line buffers in the DRAM can easily
> > >be modified to work as cache for the CPU. With 128Mb and 256Mb DRAM
> > >coming shortly, this would be enough for small systems, e.g. NCs, PDAs
> > >or game consoles. Even with smaller DRAMS, it would be ideal for
> > >embedded systems.

Notice that these guys are talking about 16-32 MBytes of memory for 
NC's and PDA's.  Undoubtably this might eventually become the case 
with interactive VR applications.  It is just a pity that the 
designers of the protocols and the programmers at Netscape, Microsoft 
and others have blown at the memory needs so much.  If some Forth 
programmers had done the job following a discipline of not 
wasting resources, standardisation with future expandability, 
program integrity, ease of maintenance etc (I only put this is 
because of the accusations that could be laid against some 
programmers), I'm sure a simular system could have been archeived in 
under 500k.  We have heard of the stories of internet packages that 
can archeive limited graphical service withing 640k, why not.  I would 
like to here Jeff's veiw on this, how much space does the ITV box code 
take up for what services?


> The MISC core would be ideal for that, but I guess we just can't clone 
> Chuck. How's the set top box is progressing, btw? Java based NCs being 
> delayed, this could mean a true chance for it (I keep my fingers crossed).

I, it is a pity.  Without the extra bit and peices as a parrallel 
edition the core would measure in thousands of transistors instead 
of the 27K required for the Arm (sorry could be 23k) but at greatly 
increased speed.  I suspect with the low count it would be more 
possible to stabilise the core.


> I am also looking forward to the F21. But notice how much has occured 
> interim, especially the advent of Beowulfs, and 1 Gbit ethernet. Mass 
> production makes even inefficient monster hardware ridiculously cheap, a 
> large handicap for MISC.


Question? how hard (extra equipement) would it take to drive 
ethernet off the F21 chip.  I had thought about protocols that 
would avoid the collision aviodance problem on ethernet that would 
get around the performance drain of to many senders on the network. 
Actually I rember something about being able to implement rings 
and ethernet over the same networks.  The reason why is that 
something like it would make an interesting bus.

Bye. 

------------------------------------------------------------------------
Wayne Morellini  <wmor1@student.monash.edu.au>

Post Graduate Student Representative.
Rusden Campus, Deakin University, Vic, Australia.

GradDip Media Studies (Current), Bach InfoTech & AD 
Business(Computing).
------------------------------------------------------------------------