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P64 Math


Readers,

The hypothetical "P64" design has been mentioned several times here.  I'm 
curious whether 64 bit-wide math would require some different approaches in 
terms of silicon.  Specifically, the carry propogation of the P21 limits how 
fast a program can perform successive additions or multiply steps.  F21 will 
have similar constraints from what I've seen.  Will the planned P32 use an adder
with ripple carry?  Is there a limit to how wide it is reasonable to use such an
adder?  Maybe 32 and 64 bit designs will require the much more complex carry 
prediction silicon in order to get acceptable performance.

--
Michael A. Losh                 Standard disclaimers apply.