Re: P16 in FPGA: Video Working!

[Roger Ivie <IVIE@xxxxxxxxxx>]

Dave Lowry said:
> With video and 5 deep parameter and return stacks, 3/4 of a Xilinx
> 4010 is being used.  The remainder will probably go to bigger stacks.

Anton Ertl has done some studies of stack caching; there's a paper on
the subject available on net (the URL, of course, escapes me; it's been a
couple of years since I read it). You may want to read it before you
devote the rest of the Xilinx to extra stack.

Roger Ivie
ivie@cc.usu.edu